On chip interconnects for multiprocessor turbo decoding architectures
نویسندگان
چکیده
منابع مشابه
On chip interconnects for multiprocessor turbo decoding architectures
Turbo codes are among the most powerful and widely adopted error correcting codes in several communication applications. The high throughput requirements of current and future standards impose that parallel decoders composed by multiple interconnected processing elements are used at the receiver side to efficiently decode turbo codes. In this work, on chip interconnects for multiprocessor turbo...
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ژورنال
عنوان ژورنال: Microprocessors and Microsystems
سال: 2011
ISSN: 0141-9331
DOI: 10.1016/j.micpro.2010.08.004